VHDL is a hardware description language suitable for describing digital circuits at the algorithmic, register transfer, and gate levels. It enables event-driven simulation and provides concepts for describing circuit hierarchy, concurrency, and time in addition to features known from programming languages. The course teaches the most important language constructs and their proper usage for hardware description. Verilog is another hardware description language which is also used to implement logic design on the hardware.
By describing the design in a high-level (=easy to understand) language, we can simulate our design before we manufacture it. This allows us to catch design errors, i.e., that the design does not work as we thought it would.
By letting a tool convert the high-level description into hardware (assuming that we can mathematically prove that the tool works correctly – which is impossible today), we can then guarantee that what we have simulated is actually what we get.
The course emphasizes challenges in digital system design in the presence of new changing technologies. Design principles to be covered include the use of hardware description languages (VHDL), simulation, controller synthesis, technology mapping, hardware prototyping, design for testability, and design for reliability.
ModelSim simulator is used for the simulation of programs. Xilinx ISE platforms are used for circuit design and synthesis and to configure the target device.
- Experience with a high-level programming language (eg. C/C++ etc.) is absolutely necessary.
- Prior knowledge of digital circuits is definite prerequisite.
- Design hierarchy: entities, architectures, their instantiation and connection
- Source code files and their compilation into design libraries
- Concurrent sequential processes
- Sequential statements
- Type system
- Description of typical hardware structures
- VHDL for hardware synthesis
- Description of regular structures
- Simulation mechanisms
- Test benches and text files
- Organization of VHDL based projects